The staff at ESD Unlimited LLC has more than 10 years experience in ESD and Latch Up design, debug and qualification.
The staffs ESD and Latch-Up experience includes:
1: Design of HBM, CDM and Latch Up microelectronic input, output and power system ESD protection structures and topologies for various digital and analog technologies.
2: Construction and Submission of ESD and Latch Up Qualification stress matrixes and analysis and debug of results.
3: Testing Printed Circuit Board topologies for System ESD (IEC), Electrical Fast Transients (EFT), and Lightning stress stress robustness, analysis of failing circuit structures and proposals for enhancing stress robustness of failing structures.
4: Automotive based (ISO) ESD and Latch-Up stress testing and qualification.
5: Analyzing Electrical Over Stress (EOS) integrated circuit damage and making recommendations to correct root cause of this damage.
Links to ESD and Latch-Up topics at this website:
- Human Body Model (HBM) Charged Device Model (CDM) Machine Model (MM) System Level ESD - IEC 61000-4-2 Electrical Fast Transients (EFT)/Burst - IEC 61000-4-4 Lightning/Surge - IEC 61000-4-5 Automotive ESD - AEC Q100 and ISO 10605 Latch-Up Electrical Overstress (EOS) ESD and Latch Up Testing and Qualification Procedures
For immediate consulting help on the above topics, contact (blog with) ESD Unlimited LLC staff at the
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